Back-end-of-line (BEOL) performance/area/cost scaling is the foremost issue for 10 nm/7 nm technology nodes. Metal lines and vias will continue to be the key areas for yield improvement, making line/via resistance as well as Cu fill the key technical challenges at 10 nm node and beyond.
Physical vapor deposition (PVD) of TaN has reached its limits to meet process requirements for precise thickness and composition control, conformality, uniformity as well as interlayer dielectric damage. Atomic layer deposition (ALD) of barrier layers show promise due to the nearly 100% conformality even in high aspect ratio structures, hence reducing “pinch off” and Cu void formation, without damaging the dielectric. However, ALD barriers have so far not delivered on their promise as PVD Ta flash deposition and/or PVD Cu seed layers were still needed to provide a good barrier-Cu interface.